This is the verilog code and testbench I developed in my master thesis, Efficient Ray Tracing of Sparse Voxel Octrees on an FPGA. The raycaster modules should be relatively clean, but it's not very ...

This is a basic CPU side Voxels to Pixels rendering (voxel raycaster) project, using a process over an Octree to accelerate the ray. For each Pixel a Ray is generated, and goes through the Octree ...