Abstract: This article presents a 72-GS/s 9-bit time-interleaved (TI) pipeline-successive approximation register successive approximation register (SAR) analog-to-digital converter (ADC) that achieves ...
Abstract: The design of comparator, 4-bit binary capacitive-array Digital-to-Analog Converter (DAC) and Successive Approximation Register (SAR) for Successive Approximation Analog-to-Digital Converter ...
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