Abstract: This article revisits the event-triggered control problem from a data-driven perspective, where unknown continuous-time linear systems subject to disturbances are taken into account. Using ...
Abstract: Power Side-Channel Attacks are effective attacks that utilize the dependency between data and power consumption of the circuit to extract its secret information, like the encryption key of ...
Abstract: We have successfully demonstrated, for the first time, the STI-less dynamic-gate (DG) technique with self-passivation sidewall (SPS) enhanced RRAM cells on a commercial 40nm CMOS production ...
Abstract: This paper mainly investigates the stability of networked evolutionary games with time delay (DNEG) based on block logic dynamic systems. First, the semi-tensor product of matrices (STP) ...
Abstract: This paper presents a 10-bit 100-MS/s 1.2-mW asynchronous SAR ADC with low-power dynamic logic units in a 65nm CMOS process. To reduce power consumption, a dynamic logic cell capable of ...
Abstract: The paper describes MS Excel-based application implementing and graphically illustrating the process of dynamic analysis of combinational logic circuits. Numerous examples obtained by the ...
Abstract: Traditionally, system identification (SysID) has emphasized point predictions and model accuracy, with limited exploration of prediction intervals (PIs) to assess uncertainty. Type-2 (T2) ...
Abstract: Many real-world sequential manipulation tasks involve a combination of discrete symbolic search and continuous motion planning, collectively known as combined task and motion planning (TAMP) ...
UAV swarms have shown immense potential for applications ranging from disaster response to military reconnaissance, but ensuring reliable communication in contested environments has remained a ...
Abstract: Achieving stable and fast response of an AVR system is challenging because of the high inductance of the windings of a synchronous generator (SG). As a result, improving AVR performance is ...
Abstract: Recent advances in secure integrated circuit design with logic locking have identified structural and algorithmic vulnerabilities that compromise various defenses to retrieve the correct ...