Hackaday

FPGA Dev Kit Unofficially Brings MSX Standard Back

In the 1980s there were an incredible number of personal computers of all shapes, sizes, and operating system types, and ...
GitHub

ShakeFlow: Functional Hardware Description with Latency-Insensitive Interface Combinators

To generate the Verilog code for our ShakeFlow port of BaseJump STL's dataflow and network-on-chip modules (Section 5): We ported Corundum's core packet processing functionalities, including ...
Automation World

Yaskawa America, Inc: Program Motoman Robotics with NI LabVIEW

Yaskawa Motoman has released a new interface supporting NI LabVIEW programming of Motoman industrial robots. Developed in collaboration with National Instruments and ImagingLab, the library allows ...
IEEE

High-Level Annotation of Routing Congestion for Xilinx Vivado HLS Designs

Abstract: Ever since transistor cost stopped decreasing, customized programmable platforms, such as field-programmable gate arrays (FPGAs), became a major way to improve software execution performance ...
IEEE

A Review of Advancements and Trends in Time-to-Digital Converters Based on FPGA

Abstract: Recently, advancements have been made in the design, implementation, and application of time-to-digital converters (TDCs) based on field-programmable gate array (FPGA) technology. The ...